Posted By
TLC
on 2023-03-19
15:11:55
|  Re: New Project: Hannes-compatible 256k RAM Expansion
@siz well, the PLD (which, I think we can agree that that should be the latest / definitive version) doesn't appear to support that.
Let me quote an excerpt from the 256KB_3.PLD file that describes the combinatorial logic in the GAL20V8.
MUX = A14* Q6* A15* Q7*/P5* P4* P6
+/A14*/Q6* A15* Q7*/P5* P4* P6
+ (....)
+/A14*/Q6*/A15*/Q7*/P5* P4*/P6*AEC
The GAL's MUX output controls, whether and when the page address from $FD15 bit0-3 (--> Q0-Q3 in Solder's schematics), is supposed to override the standard A14-A15 bits supplied by the mainboard, and the A16-A17 bits supplied by the base Hannes/Solder expansion logic. (06.PCX)
As you can see, every products have /P5 and P4 in them. From that on, it's beyond question that MUX can only ever be 1 (i.e. the Csory bank address can only take over, see 06.PCX) on the condition that P4=1 and /P5=1 - that is, P5=0.
So, P4=1, P5=0 is supposed to work, but P4=0, P5=1 isn't.
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