Posted By
Hege
on 2016-05-06
04:32:39
|  FPGATED
Hi All,
I just would like to inform you about my project that I have started 2 years ago to implement TED chip in an FPGA. It has now reached a level which I can share with the public and soon I will release source codes too.
My TED implementation runs most of the programs and demo effects. You can read more about it at:
https://hackaday.io/project/11460-fpgated
I am still developing it to make it perfect. Thanks to Levente Harsfalvi for the techincal information on several parts of the chip plus the forums of plus4world, source code of Plus4emu and Yape. I have done also several measurements on my own to learn how TED exactly works. I hope all of you can make use of my work in the future!
Hege
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Posted By
siz
on 2016-05-06
05:43:29
| Re: FPGATED
This is the news of the day! Awesome! 
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Posted By
KiCHY
on 2016-05-06
09:07:10
| Re: FPGATED
Yeah, I want a Plussy in a soapbox. Or in a Competition Pro joy
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Posted By
MIRKOSOFT
on 2016-05-06
15:16:15
| Re: FPGATED
Hi!
Great! Will be possible to apply it to Nexys4DDR?
Currently I own not Plussy, but want to get one, and FPGA variant is for my small desktop better choice.
I have one dream but my VHDL skills are too low to implement it in next months and my main project fills my whole free time.
Also - if you want to publish sources, it will be nice to adjust own keymapper...for example give to Plussy numeric block of V364
Miro
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Posted By
Hege
on 2016-05-06
16:39:23
| Re: FPGATED
I have written the code in verilog and my main goal was to make it possible one day to replace the 8360 in the Plus 4 so I made it cycle exact and tried to implement all signals of the chip. Unfortunately at the moment video signal is RGB with composite sync signal, Chroma/Luma signals are not implemented. That was not my top priority, I wanted to have similar compatibility to emulators. In the future I will concentrate on that part.
Nexys4DDR is a beast comparing to my Papilio One with Xilinx Spartan 3E. I am sure the whole system can be implemented in it even using Plus 4 built in software roms. The only difficult part is the IEC bus. In my design I don't have SD card, I decided to implement Commodore's IEC bus so that I can connect an SD2IEC or an 1541 drive to it. You have 2 options, implement SD2IEC beside FPGATED or create a wing extension with DIN connector and FET transistors to use IEC bus.
Keymatrix is a separate verilog modul and it is very easy to modify it for your needs. E.g. I have implemented CRTL+ALT+DEL reset so that I don't have to push that reset button every time I want to reset it.
Josystick emulation is still to come, for me the video and audio part was the top priority.
I still want to rewrite the internal video matrix memory because FLIs which using badline in each scanline doesn't work at the moment. DFLIs are however ok.
Source code I want to clean up a bit and add GPL license to it, upload to Github. I will release it in the coming month.
Hege
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Posted By
MIRKOSOFT
on 2016-05-06
18:15:07
| Re: FPGATED
In case of IEC implementation, I mean is good way to access microSD directly.
I'm using with my FPGA Apple II and Mega 65 (can read FAT32, but not write yet), yesterday I downloaded ZXS and Amstrad cores and try to implement them.
IEC bus is in all cases, except C128 fast serial, too slow. Generally when I'm accessing files from my C128 by 64HDD it is not acceptable, I own also fastloader, but works only on real C64...
So, think about serial, few days ago I read that 1551 is only 3x faster than 1541 - it was for me surprise - I meant that's faster...
Miro
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Posted By
Hege
on 2016-05-08
04:07:25
| Re: FPGATED
Yes, IEC serial is very slow but don't forget that I started from scratch and concentrated on TED implementation. So far I did not have time to pay attention to IEC. Due to this I decided to use the most simple solution, have the CPU ports connected to the IEC bus like in the original hardware and use an external SD2IEC to load files for testing FPGATED. Later I loaded Jiffy kernal to it and SD2iEC with jiffy is fast enough.
Don't forget that most one disk games/demos are using fast loaders which requires 1541 drive, even SD2IEC is not good enough in that case. Thus I am using an 1541-II drive as well to test games/demos.
With FPGA the limit of possibilities is the sky (or your imagination). I have future plans but first I want to see it running in my Plus 4 in a GODIL or similar and that needs Chroma/Luma signals.
This are current features working:
- TED video works fine (PAL 15KHz), emulating almost all demo effects (needs still extensive testing)
- TED audio. This was a rather simple part. Output is the same PWM signal as the original IC has.
- Counters. I believe I have managed to find out and implement the exact counter change locations (thanks for some old plus4 mailings on this website)
- TED memory controller. Proper RAS/CAS and CS0/CS1 signals
- Original TED hold times are emulated for drop in replacement purpose
Still to implement (in order of importance):
- Rewrite internal video matrix buffer to make FLIs work (which have badlines in each scanline)
- TEST NTSC mode (I don't have NTSC monitor so can't do it)
- Plus 4 frame around TED modul. At the moment I have a C16 frame due to lack of enough memory.
- Plus 4 ACIA
- User port for 1551 drive connection
- Kernal change possibility
- Memory expansions
- SIDcard
Hege
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Posted By
gerliczer
on 2016-05-08
05:54:29
| Re: FPGATED
Hi Hege,
Probably it was only a typo, but for 1551 you need the expansion port, not the user port. Also, will the external ROM select signals and the 8 bit parallel port be supported? (External SRAM/EPROM expansions of Solder? OS92 and OS96?)
On another note, modern TVs quite often support all legacy TV signalling formats (for example my SONY KDL32V4500 does, AFAIK).
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Posted By
MMS
on 2016-05-08
07:22:28
 | Re: FPGATED
Fantastic project!
Actually I would like more the plug-in FPGA implementation of the TED itself as it will instantly cure MASSIVE amount of defective Plus/4, C16, C116 currently lay defective on the market, and available "for part", cheap.
I have three Plus/4 with suspected TED defect too. So I may buy three of them, when ready... (for the standalone device I am less interested, while very much respect the efforts. Emulators are a little convenient for me).
In case, please make sure it is well protected against:
-overheat in the small C116, Plus/4 housing
-Short circuited joystick inputs by advanced joysticks with autofire, those killed massive amount of TEDs
OFF
Actually, User port is rarely used by any hardware officially, and later projects also hardly rely on this, maybe that parallel printer port of OS96 (especially as C16s and C116s are automatically closed out from USer Port projects...)
Actually there are three projects I (slowly) working on, and two is related to User port and one to IEC
-Connect a PC RS232 mouse via a MAX232 converter to User Port, able to use from BASIC and hack some drawing programs. (the SID Card with the analog port implementation would make it possible to connect a C= mouse and use it in eg. GEOS with a driver, but that project also do not progress)
-The 8bit Covox Sound card to support MOD playback via ZN428E-8 on User port, although it seems everything was already worked out 20 years ago by C64/C128 guys (actually Plus/4 has much more raw power playing MODs than the C64, not to mention the possible significant speedups by partially switching off the screen, closing out bad lines)
-Also, there is a project I am just testing, to connect IEE488 drives to IEC via an external HW. SFD1001 is a fantastic drive with 1MB/disc capacity, though IEC speed is there, and there is no Jiffy of fastloader possiblity there (my SFD drive not performing well with my current discs, maybe a head cleaning will solve this issue)
ON
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Posted By
Hege
on 2016-05-09
16:35:54
| Re: FPGATED
I always mix expansion port and user ports. Of course I mean expansion port because I am curious whether I can make it work with the 1551.
Those external ROM select signals not difficult to produce so can be done. I am however concentrating on creating a drop in chip to replace the original IC. The main problems are voltage level translation and chroma/luma signals. Implementing these needs PCB space as the FPGA is a digital device with 3.3v LVTTL pins.
I have tested FPGATED on a Smart TV and on a Sony CRT and it is working fine with both. Picture is sharp and clear.
Overheat will not be an issue, the FPGA is not so warm as the original IC. Protection on the keylatch is a good point, I have to investigate why and how original TED keylatch dies from autofire joys. I know there is already a document on it available on the internet but still don't fully understand why the latch dies.
By the way I have also an SFD1001 drive which I have to repair because its motor doesn't spin up (although I have already replaced its caps). The problem however is where to find floppy discs which are working with this drive... It needs different floppy than normal drives.
Regarding RS232 years ago I have created my own RS232 level converter for the plus4 using max232. I think for the mouse only a driver is needed (kernal modification maybe).
Currently I am cleaning up my verilog code, comment it and I want to upload it to GitHub. I will let you know when it is done, I ask for your patience.
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Posted By
MMS
on 2016-05-09
17:09:08
| Re: FPGATED
OFF (sorry I could not send a PM)
SFD1001 discs: sometimes they refer the QD as 4D discs. They are frequently appear on EB
I found brand new QD discs for SFD1001,but did not buy it (expensive postage), now it's over:
http://www.ebay.de/itm/New-sealed-box-of-10-x-5-25-floppy-disks-GoldStar-M-2DD-DS-QD-96TPI-/141915071096?nma=true&si=uErfQkbJDJ9HVYKAgE8H7O9qiT0%253D&orig_cvip=true&rt=nc&_trksid=p2047675.l2557
Currently, but ships only to UK:
http://www.ebay.co.uk/itm/like/271870345750?clk_rvr_id=1027561776204&item=271870345750&lgeo=1&vectorid=229508&rmvSB=true
ON
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Posted By
Hege
on 2016-05-12
17:40:12
| Re: FPGATED
Thanks for the hint on the discs! I will buy one but first I have to fix the drive.
Hege
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Posted By
Hege
on 2016-07-21
17:23:14
| Re: FPGATED
Hi All,
FPGATED version 1.0 with source code is finally released at
https://hackaday.io/project/11460-fpgated
If you are a gadgeteer build it, test it and give me feedback! I will be improving it until it is perfect!
Cheers
Hege
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Posted By
Litwr
on 2016-07-22
03:06:48
| Re: FPGATED
I hope this project helps to create the complete TED documentation too. Can FPGATED run p4fliconv interlaced pictures? IMHO they require 100% exactness of software or hardware emulation. It is also worth to try http://plus4world.powweb.com/software/HNY2013.
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Posted By
Hege
on 2016-07-22
08:42:24
| Re: FPGATED
I haven't tried that but will. However I am sure its not 100% perfect. Those FLIs are not ok which require badline in each scanlines. I am working on improving it!
I cannot write longer because this site always thinks I am a spammer...
Hege
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Posted By
Hege
on 2016-07-22
08:47:47
| Re: FPGATED
If someone knows how that internal videomatrix exactly works then please contact me! hegedusis at t-online.hu
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Posted By
gerliczer
on 2016-07-22
09:12:30
| Re: FPGATED
I think your best choice would be reading the source code of plus4emu. It is quite accurate in emulating the machine and its source is open.
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Posted By
Hege
on 2016-07-25
14:46:58
| Re: FPGATED
Yes, I have investigated that source code a lot! Beside my measurements I have learnt a lot from it but making it in HW is a bit different from software. You have to think in logic circuits.
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Posted By
bubis
on 2016-07-27
14:30:47
| Re: FPGATED
This is very interesting!
Altough I am TED hacker, I still don't know how it works. It would be interesting to fully understand a perfect "rewrite" of the TED.
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Posted By
Litwr
on 2016-07-28
05:21:47
| Re: FPGATED
IMHO plus4emu's video emulation is almost perfect. The only known issue is a bit wrong PAL inversion effect. My TV never shows the inversion for the bigger part of screen but plus4mu does.
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Posted By
barnieg
on 2016-07-31
09:34:58
| Re: FPGATED
Hege - thankyou for this excellent work, I've had a Mist for sometime now and it's nice to be able to play on a hardware implementation of a system I never owned.
Barnie
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Posted By
Hege
on 2016-08-23
15:32:27
| Re: FPGATED
I am glad that it has been ported to Mist FPGA! This is the first possibility to spread it widely. A C-one port would be good also.
As the Mist already has an 1541 drive emulation for sdcard, scandoubler and joystick connection it has more capabilities than my Papilio one. Be aware however if you use the scandoubler, several demo effects might not work correctly because it cannot emulate a TV screen on a VGA display. Also if NTSC mode is used because of 60Hz refresh rate some games and demos might not work because they have been written for PAL machine.
I am thinking in a scandoubler/flicker fixer which buffers a whole frame thus we could have higher refresh rates on VGA displays. That requires however extra memory which the Papilio Pro has, so I will work on that in the future.
By the way FPGATED v1.1 will be released soon on hackaday as I have implemented joystick emulation on the PS2 keyboard. TED core has not changed just the keyboard matrix and c16 top modules.
Next step is to start to port it to Papilio Pro platform and write a plus 4 top module for it. Then scandoubler/flicker fixer can come.
Please report all non working or incorrectly working games and demos. I am using sd2iec with it and that is not 100% compatible with all full disk games (although I have 1541 drives too). Note however that incompatibility can come from CPU core also.
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Posted By
siz
on 2021-01-15
10:44:15
| Re: FPGATED
Hege sent a post earlier today to the CBM-Hackers mailing list that FPGATED project hit a milestone and the drop-in replacement board is working! More details at https://hackaday.io/project/11460-fpgated.
Now we will have a chance to revive our precious TED-dead machines.
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Posted By
gerliczer
on 2021-01-15
10:53:16
| Re: FPGATED
THAT IS THE BOMB! Hats off to Hege.
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Posted By
seff
on 2021-01-15
15:05:35
 | Re: FPGATED
Brilliant! Kudos!
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Posted By
zzarko
on 2021-01-15
16:49:07
| Re: FPGATED
I have been following this project from the start and this is excellent news, congrats to Hege!
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Posted By
RobertB
on 2024-03-04
05:11:00
| Re: FPGATED
There is a new announcement about FPGATED Hardware Version 3.0 at
https://hackaday.io/project/11460/logs
Truly,
Robert Bernardo
Fresno Commodore User Group - http://www.dickestel.com/fcug.htm
Southern California Commodore & Amiga Network - http://www.portcommodore.com/sccan
April 13-14 Commodore Los Angeles Super Show 2024 - http://www.portcommodore.com/class
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Posted By
SukkoPera
on 2024-03-04
05:45:45
| Re: FPGATED
Yes, and that's incredibly good news. If V3 is going to be open source as the previous ones, this thing will get all my support. It will basically be the last step to be able to build a new, improved and fully open +4 from scratch.
Be sure not to miss this bit:
Further development is ongoing to add a SID chip implementation and improve TED core compatibility
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Posted By
Mad
on 2024-04-15
03:02:11
| Re: FPGATED
Wohoooo: Hardware version 3.0 is the result of this redesign and I can proudly say that it works flawlessly!
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