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Posted By

GreatWhiteRetro
on 2025-09-04
21:53:07

A possible fix

So you know what tools I have, I used Diag264’s advanced port diagnostic to find and fix the cassette sense, and I have one of those USB scopes I can use as a makeshift logic probe. It won’t quite measure a 17 MHz clock, heck it even has trouble measuring a 1 MHz clock. But it can work as a probe and find signal issues.

Diag264 says the upper four DDR bits are set as inputs by the firmware and supposedly nothing needs to change that, but maybe JiffyDOS messes with that. I can use the advanced port diagnostic to test any odd setup you suggest, and I still have three other TED machines to compare with.

Update: Now that I got home I started probing the signals again. I noticed that P4 through 7, being inputs to the CPU, were slightly lower voltage (3.11V) compared to the working build where they were at 3.22V.

Seeing that fixing a missing pull-up resistor fixed the cassette sense, I added 3.3k pull-ups to P4 through P7. I started with P7 and that improved things slightly. Adding one to P6 improved things further - only larger loads and Alpharay still didn’t work. Adding one to P4 finally seems to have fixed things.

There’s supposed to be a 1k resistor pack already on those pins, and those lines did come through, but maybe I have more busted traces I need to deal with.

Maybe the CPU out of my C16 was marginal compared to the two other 8501s I ordered from overseas, but as long as all three of these pins are configured as inputs on the 8501, this seems to work.
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Posted By

GreatWhiteRetro
on 2025-09-05
13:37:11

JiffyDOS unreliable on one of three L16 builds (Plus possible solution)

Some back story first: Back in March and April 2025 I assembled two LittleSixteen v4 boards, and both boards worked well with the plus/4 JiffyDOS and an SD2IEC card reader. I'd been demonstrating these systems through the spring and summer.

I just finished building a third board, and this one is giving me trouble. The stock firmware works, and the Psytronix SD2IEC fastloader also works. JiffyDOS has trouble loading items aside from short BASIC programs.

I spent the past three days troubleshooting this board, having replaced most of the IEC port-related components and checking for bad traces. I ended up discovering the Tape Sense / Cassette Sense pin on one chip had a busted trace between its line and its pullup resistor, so a very short bodge wire corrected that. Prior to this, Diag264 complained that the cassette port would fail on step 5 of its tests, but now it passes. Diag264 also says the IEC port passed.

(I wrote that out because SukkoPera and I have been in conversation about troubleshooting this, and I wanted to make sure he knew I resolved the cassette port failure.)

Now I'm stuck on trying to perfect JiffyDOS behaviour on this third build. Again, stock IEC protocol seems to work, as does the "G.I.Joe" fastloader used by Psytronix games.

This third build is supposed to be identical to the first two, but there are still some differences. I soldered in the clock crystal instead of socketing it this time, for instance, so I can't switch between NTSC and PAL on this build. I might try socketing that again so I can properly tune the colour video for both video standards. Without a fast enough scope I can't fine-tune the crystal as easily.

What sort of things should I look for to troubleshoot JiffyDOS on TED? Should I check the P0-P7 signals from the CPU to the IEC parts for instance? Should I make sure I use a certain version of 74xx06 part? (I already tried a 7406 pull from a 1541 for instance, and the original L16 v4 build uses a 74LS06, which I already have.) Should I run bodges from the CPU to the '06 part to make sure signals are clean? I already found one busted trace so there might be other marginal traces. There has to be some other small difference I missed.

When I get back I'll try a modified JiffyDOS that disables the screen flicker, and I'll try SJL264_Light to see if it makes a difference. I found both of those here after a forum search.