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| From: pzsolt (all posts)
Date: 2000-08-15
Subject: Re: Interrupts again
|
Hi Marko,
thanks for your answer! What you wrote is very important for me.
So, if the programmer does not acknowledge the interrupt in the code, the CPU will execute the the interrupt again and again.
In a word, while the IRQ line is low, the CPU will execute the interrupt code. When TED sets the IRQ line high, the CPU will not execute the (next) interrupt.
In emulation, it is better to use a flag like IRQ_LINE. When the TED wants to generate an interrupt, it has to set it to TRUE.
When the program acknowledges the interrupt, it has to set to FALSE. When IRQ_LINE has FALSE->TRUE state,
the CPU starts the 7 cycle count and so on.
Is it correct?
Greetings,
Zsolt
----- Original Message -----
From: Marko Mäkelä <msmakela@cc.hut.fi>
To: <plus4@c64.rulez.org>
Sent: Tuesday, August 15, 2000 10:34 AM Subject: Re: Interrupts again
> On Tue, 15 Aug 2000, Zsolt Prievara wrote:
>
> > Hey, nobody knows the interrupts? Or where can I find info about it?
>
> On the plus/4 processor, there are two level-sensitive interrupt inputs:
> -RESET and -IRQ. The falling-edge-sensitive -NMI input is not wired to
> the case of the chip, so you cannot use it. When e.g. the TED causes an
> interrupt, it pulls the -IRQ line low. The processor will eventually
> start the 7-cycle-long IRQ sequence if it detects that -IRQ is low and
> that the I flag is clear. The IRQ sequence sets the I flag, so the
> processor won't keep executing that sequence all the time. When the
> program clears the I flag (with CLI or RTI), the interrupt sequence will
> start again, unless the IRQ line was pulled high again (this is why the
> interrupt source should be acknowledged in the interrupte handler).
>
> I hope that this answered your questions.
>
> Marko
>
> --this message went through the plus4@c64.rulez.org emailing list---
>
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