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From: pzsolt (all posts)
Date: 2000-08-09
Subject: Relative addressing

Hi everybody,

I read the 64doc and I found something what is very incomprehensible for me.
At the relative addressing I found the following:

1 PC R fetch opcode, increment PC
2 PC R fetch operand, increment PC
3 PC R Fetch opcode of next instruction,
If branch is taken, add operand to PCL.
Otherwise increment PC.
4+ PC* R Fetch opcode of next instruction.
Fix PCH. If it did not change, increment PC.
5! PC R Fetch opcode of next instruction,
increment PC.

And a note:

"When determining real execution times, remember to subtract the last cycle."

In the doc these instructions have 3/4/5 cycles for execution, but in my old code I used 2/3/4. I'm working on a new emulation techniqe and there it is not possible to subtract one cycle. How does it work in real? It is very important for me! Help!

Thanks!

Zsolt