Posted By
TLC
on 2022-11-06
04:51:48
|  Re: Let's remake the DigiBlaster!
@SukkoPera "The SIDcard address decoder cannot exclude $FD5E/F from the SID range because it does not get A3/2/1, but luckily the SID doesn't respond to the last three addresses so I guess it won't drive the bus even if selected. That must be why Solder chose those addresses. I think the address decoding on the Digiblaster just uses the SID /CS plus a4...a0 to produce all the signals it requires. "
To clarify upon that, I didn't mean the SID card's address decoder in the first place, I really meant the DigiBlaster's. (And yep, in spite of that, I "agree", the DigiBlaster clearly had all of A0...A4 plus the SID CS' at it's disposal).
As for the last addresses being unused in the SID's register map, this is obviously true, but your corresponding guess unfortunately isn't. Although that fact may not be stressed in the datasheet, the SID still does act upon these register locations, at least for read accesses. (Writes are truly ignored, but reads, unlike expected, don't yield unconnected space, these register locations consistently return zeroes). From that point on, the DigiBlaster's address decoder must have suppressed the SID's CS' for at least the read accesses for at least the $1F register, to avoid bus contention between the SID and the A/D converter. The rest (exclusion for both $1E-$1F accesses, either read, or, both write and read) would have been all optional, maybe up to actual circuit design traits of the DigiBlaster. Ed.: but, since excluding some address space by not taking A0 and R/W' into account reduces complexity, I'd risk that the DigiBlaster actually did/does drop both $1E and $1F from the onboard SID's reach completely.
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