Posted By
bubis
on 2018-09-26
08:41:17
|  Re: Multicolor DFLI with different background colors per scanline plus x-shift
Hi Sandor,
Your measurements are not all correct.
In double clock mode this is what you have:
Every rasterline has 5 single clock cycles (DRAM refresh) followed by 16 double clock cycles (mostly during horizontal blanking). After that you either have 88 double clock cycles on the border or 44 single clock cycles on the window area (more precisely on lines 0-204) and it starts again with the 5 cycle DRAM refresh.
If you have DMA too (badline), the TED steals 40 to 43 cycles of the 44 cycles from the CPU. There is a 3 cycles grace period before the DMA happens where the CPU can finish write operations but cannot do read operations. Some CPU instructions end with one (sta,pha,...), two (inc,dec,ror,rol,...) or three (brk and interrupts) write cycles, those can finish what they started.
So, to summarize:
* on the border: 5+16+88 = 109 cycles
* on the window area without DMA: 5+16+44 = 65 cycles
* on the window area with DMA: 5+16+44-43 (+ optional 1/2/3) = 22-25 cycles
As for the DMA in practice, you can have 23 cycles with the right STA/X/Y timing or 24 with INC/DEC, otherwise you only have 22 cycles per rasterline.
It is perfectly possible to have DMA on every rasterline and change two extra TED registers in each line (but I don't think you can do three *). There are some fli routines out there that do that, like my routine in DFLIConv or the routine in IstvanV's converter in Plus4Emu. I think one of the TED register writes can be timed to change $ff19 properly without any artifacts.
This is an example for stabilizing your raster interrupt routine if you set the interrupt in the 0-204 range and if that is not a badline:
stableIrq:
sta tempa
lda $ff1e
lsr
lsr
sta reljump
reljump = *+1
bpl *+2
cmp #$c9
cmp #$c9
cmp #$c9
cmp #$c9
cmp #$c9
cmp #$c5
nop
;stable
...
inc $ff09
tempa = *+1
lda #0
rti
Maybe some of those "cmp #$c9" lines can be skipped, I am not sure. It also depends on if you use 7 or 8 cycle instructions in your code.
Update:
* : You made me think about this again and 3 TED register updates per line with DMA might be possible. I will figure out and share the results when I have a bit more time.
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