Posted By
crock
on 2011-03-17
11:17:10
 |  Re: Plus/4 C16 diagnostics and TED partial failure modes
The very first test is a RAM test which makes no use of the zero page or stack, so running purely using the 4 available cpu registers. Without a lot of hacks to the address bus (see previous discussions with TLC), the usefulness is limited in cartridge form as the cartridge is bootstrapped by the kernal, at which point we are already relying on the RAM being good as a JSR's puts the return address on the stack.
So that is why the optimum solution is to put the diag rom in place of the kernal. When the cpu reset's it starts the machine by jumping to the location stored at ($FFFC.) In the normal kernal this then sets about reseting the TED, working out how much ram is present etc. In my ROM, this is the start location of the RAM test. It writes a test pattern to all locations from $0002->$0fff and then reads back the contents, XOR'ing the result with the test pattern. Any non zero result indicates a fault situation and the screen flashes 'n' times, where 'n' is the lowest bit set in the result of the XOR, identifying which data line on the bus is at fault and thus usually which RAM chip is at fault.
There is practical limits to what a rom based solution can achieve. If the CPU, TED or PLA are totally dead - the computer will be completely non functional and the only course of action will be a scope/logic meter or start swapping chips. It will however find RAM, ROM and I/O related problems with good results.
rob
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