Posted By
TLC
on 2011-02-18
18:22:12
|  Re: Plus/4 C16 diagnostics and TED partial failure modes
Ambivalent feelings  , this time, for similar reasons having had explained by Csabo  (I'm also cooking something... not exactly a release, but it takes most of my freetime ATM nevertheless). Though, doing a small sketch won't be hard, I'll see today. (Now gotta leave for my train, sorry  ).
Edit: having done some sketches, I'm not yet satisfied with the results. As things currently stand, the circuit would take about 3 or 4 TTL chips (a flip-flop, a 8-input NAND, and some NAND and/or NOR gates). ...I feel that a bit overkill.
Edit: Hmmm, 2 TTL gates (a 74HCT74 -- dual D flip-flop -- and a 74HCT30 (8-input NAND). I've uploaded a sketch to here.
I had to diverge from the original idea a bit. First, realized that if A8 was held low, then there'd be no way to write to $fddx. $fddx is needed to map in the cartridge rom, so bad luck... Second, I spent some time figuring out the "optimal" way of switching the circuit off, once it did its task. At the end, I decided to use both flip-flops of the 7474, and chose some clever way to turn the thingy off.
-- Upon reset, both flip-flops are cleared. The first of them is responsible for holding A8 low. This flip-flop will be set, ie. A8 will be released upon the first 0-->1 transition of R/W'. (Ie. after the first write operation).
-- The second flip-flop is responsible for enabling the mapping-in of a 256 byte long slice of the EPROM to $fe00-$feff. This slice is decoded by the NAND gate. A8 is not taken into account here -- it's assumed that it is held down by the other flip-flop. The output of the NAND is "wire and"-ed with the original ROM CS' of the EPROM (I assumed C1 LOW', as you mentioned that you're experimenting with a 16k EPROM, and the fact that some EPROM needs to be mapped to $8000 in order to be recognized by the boot process). I could have used an AND gate here instead -- but didn't want to increase chip count, thus this seemingly ugly solution. The resistor might be smaller (2k2?...), 3k3 appeared good. The diodes are small schottkies... I'd presume simple 1n4148s would work equally well here (with slightly larger forward voltage drop... thus the cautiousness). This flip-flop is set by first accessing C1 LOW', _after_ having written something at least once.
How this should work?
-- The reset vector should reside at $befc/$befd (from your 16k cartridge ROM's point of view). It should point to some address between $fe00-$feff (as, the $be00-$beff slice will be mirrored at $fe00 upon power-up). The first commands of the reset routine must reside on this slice, and the reset vector must point to this routines start address.
-- The code should execute some write command first, in order to release A8. The destination of the write should not point to the $fe00-$feff range.
-- Map-in your cartridge ROM, by writing to $fdd0 + the bank config number.
-- Jump to your code (between $8000-$bfff). The $fe00-$feff ROM slice disappears, as soon as the first byte from the regular cartridge ROM was fetched. ...At this point, you have a "stock" machine, with all hacks switched off.
That's all ATM.
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