Posted By
TLC
on 2010-11-11
05:20:29
|  Re: Assembly and interrupts: my first attempt. Help needed!
Rybags:
Scanline cycles:
a.) One scanline is 114 "double" clock cycles long.
b.) In practice, on most border scanlines, you have 114-5 = 109 cycles for the CPU (because of the TED dram refresh cycles). On a few border scanlines (before and after the first lines of the character screen) c.) applies. (So far so good).
c.) On any other scanlines minus badlines, you have 114-5-40-4 = 65 cpu cycles. 5: dram refresh, 40: TED bitmap fetch cycles, 4: additional cycles reserved by TED.
d.) On a badline, you have again 40 +0..3 cycles less, ie. 22 to 25 cycles in overall (depending on the memory operation performed by the CPU on the first cycle of the TED dma request).
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