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From: Crown (all posts)
Date: 1999-03-30
Subject: RE: Strange interrupt timing

Hi,

> Once again I have some trouble with Plus/4 specs:
> All of the emulators I can reach I tried to run Castle Master. All was
> failed after the intro, because of a misplaced CLI, which enables
> interrupt too earlym just a long before the $FFFE-$FFFF adresses
> were set. (If you wanna try to find, somewhere around $8100 in the
> unpacked program, 8-10 NOPs follow it.)
>
> As I remember it worked on Plus/4, sometimes crashed because
> of this error, but usually worked properly.
>
> So I would like to ask then: what does a real Plus/4 do after CLI
> and before command? Are the disabled interrupt requests dropped?
> I tried to fix in this way (CLI drops all the actual interrupt requests),
> but it does not work, and other programs got mad.

Pending IRQ-s are cleared only if you clear their source in $ff09.
So if you have say a raster interrupt, and your IRQ handler doesn't clears the source in $ff09, then after the IRQ handler finishes, it will be regenerated, again....

So until there is active IRQ requests in $ff09, which are enabled through $ff0a, the IRQ pin of the CPU will stay low.. (Actually bit 7 of $ff09 shows the status of this line also...)

There is a minimum of 2 cycle delay between the point where the IRQ line went low, and the point where it can be first serviced.
Also if the CPU processes a SEI and an interrupt event was generated in the first cycle of the SEI instructions, then the interrupt will be serviced right after the SEI instruction.

For more detail check the Interrupt section of the c64doc.txt file... You can find it on funet somewhere, but also can be found here:
http://www.cs.cmu.edu/~dsladic/vice/doc/64doc.txt

Clearing IRQ sources in CLI is a bad idea, as it was a common method to use overlayed interrupt handlers, that means that the interrupt handler explicitly executed a CLI, to be able to service other IRQ sources as well....

Tibor Biczo