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| From: indi (all posts)
Date: 1998-05-15
Subject: Re: VICE vs C16
|
On Fri, 15 May 1998 14:42:52 +0200 (CEST), you wrote:
>Hi!
>
>On Thu, 14 May 1998, Mike Dailly wrote:
>
>> The cycle timings in the plus/4 are diff since its got 2 speeds, does
>> this cause any problems?
>Theoretically yes. But I think there is some way to arrange things so
>that it can work with our current CPU code too. How do you handle this in
>your emulator (I have not seen your sources yet).
each scanline has a "number of cycles", so the speed isn't an issue with the cycle count, bu the raster - horizontal dot counter which runs from 0 to 227 at 1.whatever Mhz (fastmode) has a fraction and 2
tables which is has 1/2 cycle values instead of whole cycles, so in slow mode... I simply add a fraction. This works perfectly... as a demo generates code from the timer value(!) and it works.. (I never thought it EVER would!).
So... perhaps it'll be okay... as long as everything else revolves around these values rather than the current "speed".
>Btw, Mike, of course the offer of joining Minus4 and VICE is still valid.
>:-)
I have barely enough time to scratch Minus/4 these days... I really would have liked to as well.... but I couldn't do it justice! which would be worse for anyone else adding to it.
Mike
^`'~*-,._.,-*~'`^`'~*-,._.,-*~'`^`'~*-,._.,-*~'`^`'~*-,._.,-*~'`^
Mike Dailly mike@scotch.demon.co.uk http://www.scotch.demon.co.uk
(Please remove the <REMOVE_ME> from my e-mail address when replying)
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