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| From: Richard Atkinson
Date: 2002-01-29
Subject: Re: 264 series kernals
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On Tue, 29 Jan 2002, Marko Mäkelä wrote:
> > perhaps Commodore was originally intending to run them in double clock
> > mode, but found that the memory refresh accesses (or TED badlines
> > even) upset the timing accurracy?
>
> Could be. Also, the 264 series doesn't have an high-to-low sensitive
> CASSETTE READ line, like all other 8-bit Commodores.
That's a pretty major issue, certainly! I should have thought of that...
It certainly would explain the extension of the shortest times, at least.
Richard
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