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| From: Rachy (all posts)
Date: 2001-07-26
Subject: Re: Castle Master once again
|
Hello once again!
On 26 Jul 2001, at 10:32, Marko Mäkelä wrote:
> The snippet you posted didn't specify how the IRQ sources have been
> initialized. Even if interrupts are enabled on the processor, the
> interrupt sources (timer, raster line comparison, etc.) can be
> disabled on the TED. Could it be like this?
I don't exactly know how the interrupt set up in this program,
because it left as the intro did. I assume there is a timer IRQ set up, due to the digital sound, with a short interval. It was definitely not disabled in any way, because then the program actually would work on every emulator then.
> If the IRQ line is asserted while the Interrupt flag is set in the
> processor's status register and if it restores to inactive state
> before the Interrupt flag is cleared (probably by writing to a TED
> register; I don't remember the C16 so well), the processor won't
> execute the interrupt sequence.
That is right, by writing to $FF09 all IRQ cleared. But the IRQs were active, that is why Castle Master crashed on emulators. In some way completion of request delayed on the real hardware.
I am trying to write some kind of test code later, to explain what is the trouble, as long as I can get a real Plus/4. (A simulation of this situation.)
Thanks anyway!
Bye:
Almos Rajnai
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