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| From: Gaia (all posts)
Date: 2000-12-01
Subject: RAM refresh cycles
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Hi All,
I have some questions concerning the RAM refresh cycles: I've already found in the archives that they are used by TED for refreshing its registers from RAM (5 regs per line). But what if the registers change can occur from several sources (like the timers for example).
How does the TED get to know that the value in RAM is a value from a user program? I guess timers are accessed a bit differently then...
Also, are the timers decreased in these RAM refresh cycles?
I am messing with some turbos (HER turbo, i think many of you knows it well
:-) ) in my emulator, and this would help a lot, as I suspect it requires very exact timings...
Thank you in advance Attila
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