Mail Archive - Plus/4 World



	Home Search Games Tapes Covers Cheats Maps Software New Stuff Hall Of Fame HVTC Game Endings Solutions Remakes Publications Magazines Effects Top List Members Groups Features Plus/4 Encyclopedia Hardware Tools Options Forum Home Search Games Tapes Covers Cheats Maps Software New Stuff Hall Of Fame HVTC Game Endings Solutions Remakes Publications Magazines Effects Top List Members Groups Features Plus/4 Encyclopedia Hardware Tools Options Forum	Login

Previous | Next

From: Marko_Mäkelä
Date: 2000-08-15
Subject: Re: Interrupts again

Hi Zsolt,

> When the program acknowledges the interrupt, it has to set to
> FALSE. When IRQ_LINE has FALSE->TRUE state,
> the CPU starts the 7 cycle count and so on.
> Is it correct?

For NMI this would be close (see the "64doc" file what happens if an NMI and an IRQ interrupt occur close to each other), but the IRQ input line is level-sensitive. It's not the state transition that activates the interrupt; in this model, the interrupt sequence could start whenever the I flag is clear and the IRQ_LINE variable equals true.

Marko