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| From: Crown (all posts)
Date: 2000-07-25
Subject: Re: Interrupts
|
> > And what happens if a request bit is set, but its interrupt occurs again? Is
> > it possible?
If you don't clear the request bit in $ff09 for a pending interrupt event, and you enable it later in $ff0a, then bit 7 will go high in $ff09 and the interrupt request will be sent to the CPU... Bit 7 of $ff09 actually shows the status of the IRQ pin of the TED, it is evaluated every cycle, and is basically an AND between $ff09 and $ff0a.
So if you have two requests pending in $ff09 and both are enabled in $ff0a and you clear only one of them in your interrupt routine, then bit 7 will stay high, and will generate a new interrupt, when you've exited your interrupt code or enabled processing of interrupts in the CPU...
Tibor
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