Posted By
Hypex
on 2017-08-19
11:45:57
|  Re: Possible 8501 replacement kit?
@Imperious
If you look at the CPU pinout he has listed and the associated schematic here you will see it is has a mistake (or two) so I'm not surprised it didn't work. It looks like he based it on the 8502 conversion but didn't fix the port lines to match the 8501:
http://www.webalice.it/gratteri/65028501.gif
He has P0 to P6 listed but the 8501 doesn't have that in sequence, it just matches the 7 line count of the 8502 port. It has (the 8501), perhaps oddly, P0 to P4, with P5 missing, then P6 to P7. I suspect, without inner knowledge, that C=? wanted to match the serial layout of the C64 $DD00 port with DATA at P7 and CLK at P6.
Now, without being corrected, following that circuit, the DATA line is connected to the CLK input and the CLK is connected to NC P5 input! So every time it tries to use serial, DATA will be output on the CLK line and the CLK will be missing! LOL! 
But I have to ask, did the core actually work? It sounds like it did. Just worse than the 6510 hack where serial can actually work. 
I'm no electronic expert, having just dabbled in electronics when I was younger, and then slowly got into programming once I got my first computer, a C16. And your board is after my own heart, looks like my past projects. But having studied that circuit and related threads I can see the problem.
Without correcting the diagram, the on board fix should be simple. Reroute P6 and P5 going to the 6522 and move them up a line bit, so the P6 goes to PA7 and P5 to PA6. If you see what I mean. Relabeling the diagram would be more clearer. Hm. DPaint anyone? 
Having read about how to turn a 6502 into a simple computer I've come to an understanding of address decoders and what those data lines are for on the 6502. Now it makes sense, in a nutshell, CPU sends out a request to access an address on the lines, then sucks in that location data byte or blows it out.
To simplify the design, since an access to location $00-$01 needs to be detected, what occurs to me is using an OR logic gate. A TI CD4048B CMOS Multifunction Expandable 8-Input Gate can be configured for this as cascade. The address MSB can go into one, output connected to another with the address LSB, then inverted and used as chip select on the 6522. So that when all A15-A1 lines are ORed together, the output will be zero, inverted into a 1 CS flag. A0 goes to the 6522 as usual. A15-A1 go to two IC chips and reduce the lines to just one. If that can work.
The 6522 also seems superfluous to me since it contains a lot of functions, basically being a CIA, but all we need is one parallel port and DDR. I read 6521 dual parallel port lacked something. I don't know what that was, but these days, I would think a WDC 65C02 and 65C21 combo should work.
A 65C816 also seems over the top, since we only need an 8-bit core, and the already extra opcodes of the 65C02 makes it worse, if they are accidentally are on purpose called upon.
If you still have your board, please try the above fix, and see if it works better.
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