| Posted By
SVS
on 2016-08-28
11:44:44
 |  Does exist a Halt & Catch Fire instruction on 6502/8501?
I'm seeing the series Halt & Catch Fire, then I wonder if a similar undocumented ML instruction is real on our machine (or in 6502 based machines).
For who don't know the tale, a HCF instruction is a (secret) test command to force the microprocessor into a stress test so that rumors tells it "could" burn.
The relative uP 6800 has!
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Posted By
gerliczer
on 2016-08-29
00:24:54
| Re: Does exist a Halt & Catch Fire instruction on 6502/8501?
I think this Halt & Catch Fire is either a joke gone urban legend or a misunderstanding. There are military grade components, which means extended temperature range and maybe more robust mechanical construction only. I guess, someone, either for a joke or by wild guessing, started to spread this and it got everywhere. Military hardware contains so much "interesting" parts and solutions that it is not only the CPU that should be protected by catching fire at a command.
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Posted By
Litwr
on 2016-08-29
06:15:27
| Re: Does exist a Halt & Catch Fire instruction on 6502/8501?
I'd read that the later VAX imported by SU in about 1990 had the special code which had to destruct these computers. IMHO VAX were obsolete to 1992-93... 80486, 68030 and ARM could outperform them.
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Posted By
SVS
on 2016-08-30
07:40:11
| Re: Does exist a Halt & Catch Fire instruction on 6502/8501?
It is interesting, maybe never explained the reason, that all the possible 6502 codes with "2" as second nibble ($12 $C2, $F2, etc) do halt the processor without any chance to restart.
But there is the exception of $A2 that on the contrary works fine as LDX #nn (a mystery in the mystery).
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Posted By
siz
on 2016-08-30
12:14:12
| Re: Does exist a Halt & Catch Fire instruction on 6502/8501?
KIL opcodes are explained at http://www.pagetable.com/?p=39. At the moment I cannot access the site, only the Google stored version but the explanation is there.
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Posted By
gerliczer
on 2016-08-30
13:01:28
| Re: Does exist a Halt & Catch Fire instruction on 6502/8501?
AFAIR, the KIL opcodes happen because of two design errors in the 6502 CPUs. One is the same that makes "illegal" opcodes work, the other is sloppiness of the designers.
There is a sequencer type part of the 6502 that drives the execution of the instructions. It reads the steps to perform from a "microcode" table. This table is not fully decoded (doesn't contain all 256 possible opcodes), but what is even worse is that it selects the instructions on parts of the opcode only. This leads to cases where mode than one "microcode" sequence is selected at the same time, so in certain cases the CPU erroneously performs the steps of more than one instruction in parallel, which are called "illegal" instructions.
The table also has markers at the end of every instruction to signal that execution ended, and the next instruction must be fetched. However, the sequences of various instructions (the number of clock cycles the execution takes) are not equally long. The sequences in the "microcode" table are not properly filled after the end marker, because the sequencer shouldn't read data from those parts. However, when the decoder selects more than one sequence to execute, it may happen that reading overruns to these uninitialised areas, and the sequencer will not find an instruction end marker. The sequencer is a very simple design, it always tries to read the next instruction step until it reaches the end marker, but in these special cases this never happens, therefore the CPU goes into an "infinite loop" itself.
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