Posted By
Hege
on 2016-05-06
16:39:23
|  Re: FPGATED
I have written the code in verilog and my main goal was to make it possible one day to replace the 8360 in the Plus 4 so I made it cycle exact and tried to implement all signals of the chip. Unfortunately at the moment video signal is RGB with composite sync signal, Chroma/Luma signals are not implemented. That was not my top priority, I wanted to have similar compatibility to emulators. In the future I will concentrate on that part.
Nexys4DDR is a beast comparing to my Papilio One with Xilinx Spartan 3E. I am sure the whole system can be implemented in it even using Plus 4 built in software roms. The only difficult part is the IEC bus. In my design I don't have SD card, I decided to implement Commodore's IEC bus so that I can connect an SD2IEC or an 1541 drive to it. You have 2 options, implement SD2IEC beside FPGATED or create a wing extension with DIN connector and FET transistors to use IEC bus.
Keymatrix is a separate verilog modul and it is very easy to modify it for your needs. E.g. I have implemented CRTL+ALT+DEL reset so that I don't have to push that reset button every time I want to reset it.
Josystick emulation is still to come, for me the video and audio part was the top priority.
I still want to rewrite the internal video matrix memory because FLIs which using badline in each scanline doesn't work at the moment. DFLIs are however ok.
Source code I want to clean up a bit and add GPL license to it, upload to Github. I will release it in the coming month.
Hege
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