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| | Previous Messages | Posted By
Fuzzweed
on 2024-09-28
04:58:21
|  Re: Understanding cartridge hardware
Thankyou this is perfect. 
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Posted By
SukkoPera
on 2024-09-28
04:51:40
| Re: Understanding cartridge hardware
/CS0 and /CS1 are generated directly by the TED.
/CS0 is asserted (i.e.: it goes low) when it sees any address in the $8000−$BFFF rangge on the address bus.
/CS1 is the same thing but for the $C000−$FFFF range (more likely up to $FCFF, since then we have the I/O area at $FD00-$FEFF and the TED's own register space at $FF00-$FF3F).
Then if you have a look at the schematics:
You should understand that what happens when either /CS0 or /CS1 go low depends on the outputs of U15, which are controlled by writing to $FDDx.
So, if for instance you have set the ROM banking configuration to $FDD2, for instance (C1LO + KERNAL), any access to the $8000−$BFFF area will have /CS0 and /C1LO go low. Any access to the $C000−$FFFF area will have /CS1 and the KERNAL ROM /CS go low.
Hope it helps.
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Posted By
Fuzzweed
on 2024-09-28
04:35:48
| Re: Understanding cartridge hardware
Sorry my post got cut short.
I see the software explanation here
https://plus4world.powweb.com/forum/41295/Programming
It's how this is shown at the cart port on the cs pins I'm interested in
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Posted By
Fuzzweed
on 2024-09-28
04:32:50
| Re: Understanding cartridge hardware
Ok so no1, that's amazing news I'll keep my eye open for this.
No2 I would also like a long explanation
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Posted By
SukkoPera
on 2024-09-28
04:17:50
| Re: Understanding cartridge hardware
If you want I'll give you the long explanation, but I'll start with the short one: yes, it's possible, the next release of OpenC16Cart will support that configuration and will give you up to 64k of ROM space. This has already been manufactured and tested but I plan to release it in the not-so-close future unless there are good reasons .
BTW, as far as I'm aware, the only software currently existing that runs from bank 2 is Octasoft BASIC 7.0.
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Posted By
Fuzzweed
on 2024-09-28
03:10:24
| Understanding cartridge hardware
Hi. A
I'd like to understand how the CS0, CS1, CS1low, CS1hi, CS2low, CS2hi pins on the cart port function together/individually to bank ROMs in.
I've been studying the magic cart and game cart schematics and noone seems to be using CS2.
I wonder why this isn't used?
I suppose my follow up question is could CS2 be used as an upper address to bank in total 64k (4x16k) on a suitablly sized eeprom just using the +4 'registers' and maybe some very minimal logic decoding.
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