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| | Previous Messages | Posted By
Stinaris
on 2017-09-19
16:44:46
 |  Re: What would I do differently in the Plus/4
I'd simply scrap all the other models and keep the C16 but with 64k.
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Posted By
Litwr
on 2016-10-18
13:05:32
| Re: What would I do differently in the Plus/4
Sorry, I still have no time to read about 6516. 
So I can only say about some obvious to me things. The C64 acceleration looks like a kind of masterpiece for me. SID and VIC can't work at 2 or 4 (!) MHz. So this project should use the very tricky electronics to give the proper frequency to them. C+4 is much easier. We may just add controllable (by AEC, BA, ...) clock divider at TED output phi2 frequency. C64 project may work at 4 times higher frequency, C+4 with clock divider will use only 2 times higher frequency for CPU, RAM, ROM, ... TED will work at the same frequency as before. I also have to repeat, it is just a hypothesis.
EDIT.
I've just read the article about 6516. A lot of thanks for this interesting data. It is another mystery around 6502... What prevented to release this chip? IMHO the idea of user defined flag was great. It also might use faster instructions like 4510 which appeared only 10 years later. The idea of modes looks wrong for me. 65816 implements it and this makes it a bit *clumsy*.
EDIT.
I've just found this page about 6516...
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Posted By
JamesD
on 2016-09-26
15:19:16
| Re: What would I do differently in the Plus/4
FWIW, the 6516 was actually to be very different than the 65816 by the looks of the first article.
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Posted By
Csabo
on 2016-09-26
08:52:08
| Re: What would I do differently in the Plus/4
(Off topic: I read the comments on that page JamesD just linked to... But I probably shouldn't have. So much baffling needless drama. Sometimes I wonder if our scene looks like that to outsiders too.)
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Posted By
JamesD
on 2016-09-26
11:12:56
| Re: What would I do differently in the Plus/4
Is this the 4MHz C64 project you were talking about?
*edit*
Here is the project page, the csdb page I originally posted had some relevant comments but it also had a lot of drama.
projekt64:turbo
Here is the most important comment from the csdb page:
"...I've decided to force CPU to run at 2 Mhz at bad line, 3 Mhz at long/normal line, and 4 Mhz on borders. CPU power at 4Mhz mode is about 3.5 faster as is in 1Mhz mode. I found benchmark on internet (some FP calculations in BASIC) so 1Mhz takes 1m41s and 4Mhz mode takes 29s. ..."
I just want to point out that the CPLD he's using here, has more pins than the TED and possibly as many as the TED and CPU combined.
Doing this back in the day would have required a lot of high speed 74LS parts that may have been in short supply or a new TED.
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Posted By
Litwr
on 2016-09-26
01:45:15
| Re: What would I do differently in the Plus/4
Sorry, I didn't note the difference. JamesD, thank you very much for this thread. You've provided a lot of very interesting facts. 
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Posted By
JamesD
on 2016-09-26
11:16:57
| Re: What would I do differently in the Plus/4
You can find the magazine issues it's mentioned in here:
MICRO The 6502 Journal on the Internet Archive
No matter how many times you mention the MOS 6509, it's still not what I'm talking about.
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Posted By
Litwr
on 2016-09-25
23:39:37
| Re: What would I do differently in the Plus/4
Excuse me. The number 6516 was completely unfamiliar for me. It is not mentioned in Wikipedia 6509 article too...
IMHO CBM II would have more flexible MMU for 256 KB, 1 MB was too much for 1981.
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Posted By
JamesD
on 2016-09-25
17:47:38
| Re: What would I do differently in the Plus/4
Did I say MOS 6509? Or did I repeatedly say something else?
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Posted By
Litwr
on 2016-09-25
23:34:55
| Re: What would I do differently in the Plus/4
[z80] 1.3 MHz for CPU + 1.4 MHz for video (Amstrad PCW uses 720x256 video and was cheap) = 2.7 MHz.  RAM used always are with the higher limits, for example, 3 MHz.
BBC Micro was at 1981 and has a lot of other expensive parts : 4 ADC, TUBE interface, 2 video chips, ...
C+4 was at 1984 when DRAM were much cheaper. For example, VIC-20 of 1981 uses SRAM (!) because it was cheaper at 1981...
I'm almost sure if we would have more enthusiastic experts in electronics then we had C+4 at 3.5 MHz like mentioned C64 project. However it is just hypothesis...
Do you mean 6509 from CBM II? It has the same commands as 6502 plus 2 additional instructions to work with 1 MB address space. It is interesting why 2 MHz 6502 almost completely missed US market (BBC Micro, CBM II, Apple III)? Tandy Color was underclocked...
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Posted By
JamesD
on 2016-10-03
17:27:02
| Re: What would I do differently in the Plus/4
Just a few points here.
If it were easy, there would have been several faster 6502 machines.
Changing the processor speed probably violates one of the key points of the topic. It's probably going to require a change to the TED. At least back then. Bil Herd even mentioned shortages of 74LS chips at that time, let alone high speed DRAM.
The key example here cited as proof it's possible is the BBC Micro, but when Acorn tried to make it price competitive with the Electron, the machine was clocked half as fast. Acorn had difficulties with the chip that reduced the parts count, and they reduced the speed to reduce the cost. There's a reason the Acorn Electron was designed to use slower RAM. Even after that, it was more expensive than the Spectrum which was the type of machine the TED was targeted at.
Implementing something like this now might seem trivial, but back then it's a huge deal.
BTW, the 6509/6516 part I mentioned was something proposed by Synertek, supposedly originally for release in early 1979.
It was to be called the SY6516 and is first mentioned in Micro issue 21 (Feb 1980) Page 11.
It's also mentioned in issue 22, 23, and 24. In 24 Synertek denies it's existence.
There are some followup letters in response to the articles, but talk of an improved 6502 pretty much end by the time Micro adds 6809 support in issue 37.
It was supposedly designed to be source compatible with the 6502 but not binary compatible.
For an all new machine I don't see that as a huge issue, but people using a monitor that are used to existing opcodes may disagree.
*edit*
I couldn't find the reference in issue 21, I think the page may be missing from that scan.
Issue 23 page 9 has the original article on page 36.
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Posted By
gerliczer
on 2016-09-25
09:18:15
| Re: What would I do differently in the Plus/4
Litwr, I still don't get it. What are the steps of the calculation that gives you the result of Z80 machines using the RAM at 2.5-3 MHz?
This is how I understand it works: If we have a Z80 CPU running at 4 MHz then the T-states last for 250 μs. Between two M-cycles there are at least 3 T-states, which means that the next memory access happens 750 μs after the previous at the earliest. We measure the time between the same phase of consecutive memory operations (like the start or the end or setting up CAS or anything like that), not the time passed between the end of the last and beginning of the next, because the latter wouldn't be the frequency. 1/(750 μs) ≈ 1.33 MHz.
Or did you add to that figure the RAM accesses of other devices besides the CPU?
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Posted By
Litwr
on 2016-09-25
01:29:55
| Re: What would I do differently in the Plus/4
TED will not be melted by 3.5 MHz because it will work at the same frequency. It will only use the different clock dividers. Only CPU will slightly warmer. IMHO CPU could work at 3.5 MHz.
It is interesting that MOSTEC had 10 MHz (!) 6502 at 1976... Try to imagine what they could make without Commodore?! There is a project for C64 which uses CPU and RAM at 4 MHz - http://wiki.projekt64.filety.pl/doku.php?id=projekt64:turbo
I agree that most z80 systems (Speccy, CPC/PCW, Enterprize, ...) could use RAM at about 2.5-3 MHz. It is not a big difference with 3.5 MHz.
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Posted By
JamesD
on 2016-09-23
11:59:02
| Re: What would I do differently in the Plus/4
The key with the Z80 is that it doesn't access DRAM faster than it can get ready for another access.
The actual accesses are shorter in duration due to the higher clock speed, but they are further apart.
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Posted By
gerliczer
on 2016-09-23
03:40:04
| Re: What would I do differently in the Plus/4
@Litwr: After you drew my attention to my lack of knowledge I went to learn something new. After reading the Z80 CPU User Manual I understood that there are at least 3 but not more than 6 T-states between two M-cycles. Therefore I still maintain my standpoint that no 4 MHz Z80 was, is or ever will use memory at 3.5-4 MHz. Such processors access memory at slightly more than 1.33 MHz rate at the most. To have memory access rate in the 3.5 to 4 million per second range you have to run your Z80 at 10.5-12 MHz at the least.
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Posted By
JamesD
on 2016-09-23
00:02:47
| Re: What would I do differently in the Plus/4
"up to" Litwr
*edit*
Clocking the CPU faster would be one of the biggest advantages the machine could have had.
I think if people had the choice between a faster clock and sprites, this would be the better choice.
The CPU doesn't have to take only half of the clock cycles.
In lower resolutions, the CPU could receive 3/4 of the clock cycles + extra border cycles.
If 640x200 were supported, then half of all clock cycles + extra border cycles.
That would make it the fastest 6502 system at the time.
Software sprites would be reasonably close to the speed of hardware ones.
And for number crunching, it stomps on the Apple II and probably most Z80s machines.
UCSD Pascal P-Code would probably execute nearly as fast as native Pascal compiler output for the 6502.
If Commodore includes the 6516 instruction additions, it's a scary little powerhouse.
But, I'm sure that would require a different TED. And given the current failure rate of TEDs due to heat, the machine might also have the lifespan of a gnat.
I'm also sure it would add more to the price of the machine than you think.
The BBC Micro Model A was around $266 given the historical exchange rate, and that was with only 16K. They also had to raise prices after that.
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Posted By
Litwr
on 2016-09-22
16:30:25
| Re: What would I do differently in the Plus/4
z80. LD (HL),n uses 10 t-states and has 3 access to the memory, so we have 3.33 t-states not 4. These accesses to memory are irregular... LD HL,(address) uses even 16 t-states and 5 accesses to the memory.
BBC Micro uses RAM at 4 Mhz (see wiki). 2 Mhz for CPU and 2 Mhz for video. So DRAM for 4 Mhz was available at 1981. MSX was the exception, they use too slow RAM.
Maybe +4 requires a bit faster RAM for 3.5 MHz but the price couldn't differ much.
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Posted By
JamesD
on 2016-09-22
15:59:26
| Re: What would I do differently in the Plus/4
@gerliczer
Some machines could enable or disable DRAM refresh. The CoCo 1/2 for example. However, I don't know if anyone ever took advantage of it.
*edit*
FWIW, The MC-10 is based on SRAM. Then they didn't have to deal with DRAM refresh and kept the design simple.
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Posted By
JamesD
on 2016-09-22
15:20:08
| Re: What would I do differently in the Plus/4
gerliczer is correct on the Z80.
There can be up to 4 t-states per memory access.
Part of the reason earlier Z-80 machines only run at 1.5-2 MHz is due to the RAM speed of the day.
The TRS-80 Model I can easily be sped up if you drop in faster DRAMs. The later Model III came from the factory running at the higher speed.
The MSX hardware created additional wait states so it could use cheap DRAMs.
The BBC Micro ran at 2MHz. They added coprocessor boards later with their own RAM at higher speeds, but it's not the same as the main CPU being clocked faster.
The Apple IIc Plus had a higher clock speed, but it achieved it with SRAM cache. Main memory was still slow. And that machine came out in 1988!
*edit*
SRAM doesn't require cycles to be used for refresh, so they are faster that way. I don't know about faster SRAMs coming out before DRAMs though.
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Posted By
gerliczer
on 2016-09-22
03:26:33
| Re: What would I do differently in the Plus/4
@Litwr: I think you are wrong. I don't know anything about the ARM processors, but Z80 works completely different than 6502. The 6502 does a memory access in every clock cycle, the Z80 doesn't.
Z80 has so called T-cycles and M-cycles. T-cycles are the actual clock signal, therefore if a Z80 runs at 4 MHz then there are four million T-cycles in every second. M-cycles are the memory access cycles. These are those instances when the Z80 turns to the memory to fetch instructions and addresses, read or write data. There is a special output on the Z80 called M1 which signals when the processor fetches the next instruction. Also there's a special input like on the 6502s that signals to the processor that the memory operation is not finished so it should wait to complete the current instruction. The number of M-cycles is a fraction of the T-cycles. I don't know exactly how it works, but if my mind serves me well, there are at least 4 T-cycles between two M-cycles. So, the memory access frequency is quite similar in both kinds of systems. There's no such thing as z80 systems use RAM at 3.5-4 MHz.
Especially because memory of these systems simply does not have that necessary speed. I read in the datasheet of the NEC 41256 DRAM that even the so called 100 ns speed grade memory ICs have a cycle time of 220 ns. The 100 ns is the time under which the read or write operation is executed. However, the IC needs an additional 120 ns to prepare for the next memory access. That means that even with these quite fast RAMs the system may access the memory at ~4.5 MHz at best. Can you imagine what happens in systems that has 150, 200 or even 300 ns RAMs? Furthermore, do you think that it was only by mistake that these systems not used the best memory available? Or did it have something to do with price?
An example for the memory access situation. The Enterprise, a nice Z80 based machine, has dedicated video RAM. The video controller runs its memory bus slightly under 900 kHz because of raster line timing reasons, and does 3 memory accesses in every clock cycle. Two is used by the video chip, the third is available for the CPU, which runs at 4 MHz. The memory accesses are obviously unaligned no matter what is done, therefore the video controller is capable of stretching the clock cycle of the processor to synchronize its read or write with the video memory bus clock. Another interesting part of the system is that the main memory system has a control flag, which when turned on adds one clock cycle delay to the memory accesses. The documentation says that it is there for machines built with slow, I think it explicitly says 300 ns or slower, RAM.
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Posted By
Litwr
on 2016-09-22
00:13:34
| Re: What would I do differently in the Plus/4
BBC Micro of 1981 uses RAM at 4 MHz, so plus/4 of 1984 may use the same or better. I've read somewhere that C128 in VDC mode may work stable at 4 MHz. A lot of z80 systems use RAM at 3.5-4 MHz too. The quadruple frequency for TED is about 3.5 MHz...
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Posted By
JamesD
on 2016-09-21
20:43:16
| Re: What would I do differently in the Plus/4
As long as the TED doesn't have to access RAM, it can chug along at normal speed and you can drive the CPU at a different speed.
The one question I have here, is what speed were 64Kx4 RAMs?
As long as they are fast enough, you should be ok.
In theory, you only need to slow the CPU down when the TED accesses the RAM/ROM buss.
I think you'd need to use some buss isolation to retrofit the machine with a higher clock, and you have to sync between the TED clock and the CPU.
*edit*
And you'd need to slow the CPU down to access the TED.
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Posted By
Litwr
on 2016-09-21
16:02:16
| Re: What would I do differently in the Plus/4
I used composite bw monitor with Amiga 500. However it had support for the required for 640x256 raster frequencies. Commodore composite monitors were not capable for this. I also tried to use Raspberry Pi with TV set via analog input. It can generate raster for about 62x31 characters but colors are terrible. I know PC which use 512x256 raster with PAL or SECAM TV...
@MMS. I don't know electronics well. My opinion is just to use changed TED clock dividers for CPU and don't change them for video. To use frequency 2 times higher at borders. It should work IMHO.
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Posted By
JamesD
on 2016-09-21
15:39:54
| Re: What would I do differently in the Plus/4
The Apple and CP/M machines display 80 columns on monochrome composite monitors.
I'm sure Commodore could have provided a monitor that could be switched between modes if need be.
You can display an 80 column layout on a TV, but you aren't going to read it.
I don't know how good it will look on a color composite monitor.
I think PAL will display it okay but I'm not 100% sure.
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Posted By
gerliczer
on 2016-09-21
14:38:59
| Re: What would I do differently in the Plus/4
@MMS: due to a HW bug in VIC-20 and C64
Wrong. The error you are talking about is in the VIA, so it is due to the bug in the 1540 & 1541 drives and the VIC-20.
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Posted By
MMS
on 2016-09-21
13:53:26
 | Re: What would I do differently in the Plus/4
OFF
just from this single topic point I learned a lot of new and useful things. Many thanks!
LITWR: your points are crystal clear.
Questions:
-did you inspected the circuit diagrams, how the double frequency generated for the borders by Plussy, and is there any chance to make it quad frequency easily? I remember it was mentioned once previously. What could be the side effect?
-As I see, the PAL and NTSC rastertime/bandwidth do not let 80 chars in a row, as it expecting 640 pixel horizontal resolution. The 62 chars is an interesting option, one step closer to NLQ printers.
I did not fully understand it before, why then the PC CGA could be connected to a TV with composite output, as it had 640x200 and 80 char mode.
Now I checked it, and fully understood the situation, even IBM could not solve this TV system limitation:
"IBM intended that CGA be compatible with a home television set. The 40x25 text and 320x200 graphics modes are usable with a television, and the 80x25 text and 640x200 graphics modes are intended for a monitor."
-1571: the 1540 and 1541 are slow because it uses SW bitbanging, due to a HW bug in VIC-20 and C64. If the Plus/4 would have used a corrected one, free from this defect (existing in an IC produced already in millions as I know), then the 1571 could be used in the same way as with C128.
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Posted By
JamesD
on 2016-09-21
13:53:07
| Re: What would I do differently in the Plus/4
Placing the I/O lines on the 6510 was an ill conceived change IMHO. It was easy to do and reduced the parts count, but it ate up pins that should have been used for something else. And it meant no easy drop in replacement CPUs like the 65802.
A MOS 6509 could have been implemented using a similar technique as used by the 6803 and 65816.
Multiplex new address lines on the data buss. Just set the upper address lines when they need to change by loading then during the first part of the buss cycle. This requires an external latch and a signal from the CPU. Sadly, that means another pin and I have no idea where they would get that unless they combined pins with an encoder inside and used an external decoder to generate the proper signals. While it would work, it needs more support chips or a custom external chip. And it just seems like an ugly way to add one pin.
*edit* I'm referring to combining the 6509 with the 6510 I/O port here. Without the I/O port there are plenty of pins.
But that's not the chip I was talking about. The 6516 added features similar to the 6809, hence why it might have been referred to as the 6509... before the MOS 6509 existed.
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Posted By
Litwr
on 2016-09-21
10:29:43
| Re: What would I do differently in the Plus/4
I'd looked at 6509 data sheets. 6509 has only two instructions to work directly with 20 bit bus, LDA and STA. It was used with stylish CBM II. However 7501/8501 uses 7 lines for i/o...
JMP ($xFF) warp is documented at MOSTEC manual of 1976 so as warps of LDA $ff,X or LDA ($ff,X) for X > 0. I used it in the fast division routine. I had to add one byte for 65816 (SuperCPU) compatibility.
Yes, BCD is useful for scores. I'd used it with Xlife. However, BCD maybe evaded. BCD code makes addition/subtraction about 50% slower, and multiplication/division about 200% slower. It is only faster for the text input/output.
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Posted By
JamesD
on 2016-09-21
04:51:14
| Re: What would I do differently in the Plus/4
@Litwr
The 6516/6509 spec I'm talking about had a lot of the features of the 65816 but I don't think it supported the 24 bit address buss. It is not the same as the MOS 6509. The MOS 6509 way of addressing memory isn't as useful as an MMU.
JMP ($1FF) crosses a page, it shouldn't wrap around but it does. I don't care if someone on the C64 used it to be tricky, it shouldn't wrap around. But that's just me. Most code won't do that.
BCD is commonly used for a quick way to do score keeping in games and it's used in some business software. I don't see that changing even if it is slower. I really don't use it so... I don't care.
Changing the cpu obviously wasn't in Commodore's plans, but I think several of us agree it probably should have been.
"So the way to improve C+4 is to change the Commodore architecture at all."
Do you mean not to change?
I know that 1571 isn't fast with the Plus/4, I was suggesting they adopt that change earlier.
The reason I didn't suggest the 1581 was 3.5" drives were brand new in 1983 and not everybody chose the same standard. They also weren't even double sided until some time in 1984.
If that were available in time it would certainly be a nice option, but you can't stick in an existing VIC20 or C64 disk in a 3.5" drive either. It's another tradeoff.
While you can use the disk drives to do additional number crunching, the slow interface limits that use.
You definitely need more RAM to do anything complicated, which is pretty much why you would try to use the drive in the first place though.
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Posted By
RobertB
on 2016-09-21
02:36:46
| Re: What would I do differently in the Plus/4
JamesD wrote:
> Commodore certainly would have had to pursue the US education market to really attack the Apple II on it's own turf. Getting a foothold in that market would be worth the investment in the long run.
Just to clear up a misconception... CBM did have a foothold in the education market. The Commodore PET was used in school districts in and around the San Francisco area and the Portland, Oregon area (just two examples). In 1982, this was followed by the Commodore Educator 64 (a.k.a. PET 64) which was a C64 board in a PET-style all-in-one case. These big-box computers were favored by educators, because they were considered heavy-duty and not easily stolen as would be the smaller, keyboard-style computers, like the VIC-20, C64, and Plus/4.
Writing from Sydney, Australia,
Robert Bernardo
Fresno Commodore User Group
http://www.dickestel.com/fcug.htm
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Posted By
Litwr
on 2016-09-21
07:34:35
| Re: What would I do differently in the Plus/4
IMHO Plus/4 is almost perfect for its price and architecture. I am even sure that C+4 cursor keys have the perfect design, the better than other PC. They could only use the quadruple frequency at the borders instead of double. However C+4 gives about 70% of all ticks to CPU, BBC Micro and Apple ][ only 50%, C64 - 40%. So C+4 is the best here, only some z80 systems use CPU better.
80 columns text requires a special RGB-monitor, not TV set or Commodore composite monitor. However, 64x32 bw text is the possible option. 6509 for 1 MB of addressable memory might be an interesting option too.
[Education] Commodore PET started the era of PC in the education (together with much more expensive and not suitable for school Terak 8510/a). CBM didn't try to keep this position and gave it up to Apple...
[CMOS 6502] It executes JMP ($1FF) not the same as NMOS/HMOS 6502. IMHO 65C02 was a step in the wrong direction. It makes slower decimal mode even more slower. It implements a lot of opcodes with very little usability - it was the great opcode space waste preventing the further expansion. It can't use the several usable undocumented opcodes of 6502 which are used widely by software for C64/+4... I tried to convert some my codes to BBC Master - 65C02 codes had become only 2% shorter. 65C02 has the several very good instructions (BIT#, DEA, INA) though...
So the way to improve C+4 is to change the Commodore architecture at all.
[6502] Delete useless decimal mode and overflow flag. Add new powerful instructions instead, for example, with the second accumulator (like 6800) or addressing mode (#,x) - take the high byte of address from the immediate operand and low byte from the index register.
[disk drives] add more RAM to them. So they maybe used as the additional processors. I would like to use the real multi-thread +4 programs.
[1571] It can't be fast with +4. Its high speed (5500 bps!) is accessible only from 75% of C128. So 1581 is better for the better storage capacity.
IMHO Commodore was like a technology terminator. It killed 6502 CPU line, VIC-2 might be upgraded too, 1 MB floppy drives for cheap DD media were not popularized by more affordable price, VDC is the typical example of this poor fate, C264 ... It could even terminate the great Amiga PC.
Sorry if my English is a bit wrong.
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Posted By
JamesD
on 2016-09-20
15:32:19
| Re: What would I do differently in the Plus/4
ROM is the same speed as RAM in the Plus/4. I only suggested copying to RAM for a different memory map.
It could run out of a combination of ROM and RAM to have the most memory.
Copying 8K or 16K from ROM to RAM should take under 1/15 of a second even with a slow loop.
Decompressing from ROM to RAM might take a second or two with heavy compression, under a second with a more moderate compression.
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Posted By
MMS
on 2016-09-20
14:49:25
| Re: What would I do differently in the Plus/4
I dunno, but if the 3+1 was copied into RAM at once (I think the startup is just too fast for that) to speed up operation, then it is logical, while we see all those RAM limitations on editable area. Sure, that programs were ran slower from ROM, then RAM, but in case on +4 the difference could be JUST noticeable.
On C64 the Pagefox cartridge module SW ran from ROM and ADDED extra 32KB RAM (?) to store and edit the 640x800 sized A4 bitmap page and keep the Undo data. It was a fantastic Scanntronic module (I own one). Eddifox GFX module was even able to do 3D transformation on the pictures. (nowadays most of the documents available only in German language)
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Posted By
JamesD
on 2016-09-20
02:29:09
| Re: What would I do differently in the Plus/4
I haven't looked at the 3+1 memory map. But, if the 3+1 software copied itself from ROM to RAM, I would think it could have altered the memory map to 64K RAM or could access the kernel when I/O as needed. 99 lines of text is about 4 pages and is less than 5K.
A RAM expansion shouldn't be that difficult, but you need an input to disable internal memory mapping to the build in RAM and ROM. Basically, you intercept the chip selects. or something similar.
Then the expansion can put RAM anywhere it wants. It's going to require some logic to deal with that.
The actual paging circuit for external RAM could be on the expansion itself. Dealing with refresh for DRAMs... I don't know enough about how that works to say how to do it. Now you'd use a big SRAM.
Back then it would be 2 64Kx4 DRAMs. That's not very big board wise so it begs for even larger expansions.
I think 128K became the new 64K shortly after Apple shipped the IIe. You didn't have to ship with it, just support it. The C64 got around it by mostly being a video game with a keyboard. Kids got a videogame and parents thought it would help with their homework, so better than a videogame!
*edit*
If the 3+1 software is moving from ROM to RAM, it could be stored in ROM in compressed form. Then maybe the programs could have fit in ROM without being stripped down.
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Posted By
MMS
on 2016-09-20
14:24:51
| Re: What would I do differently in the Plus/4
JamesD, Fully agree
Just some thoughs:
Actually, highly probable it was the case. the design was ready, and marketing/management wanted to max out the profit from the project. So they created an expensive product with built-in 3+1 instead selling millions of TEDs just for 60 USD.
Well, the 3+1 ROM idea was not bad, but not in this form. A text editor only with 99 lines of text... It is maximum a notepad. And if SW runs from ROM, where is that 64K RAM? Or only 16K addressed, although only used only in the 64K machines ?
Also, making RAM extension sooo complex limited Plussy future possibilities, as far as I know, mimicing the C64/C128 REU would be a real challange (though once I read from someone that external SRAM memory expansion was easier than though by the guy. unfortunately I have no details, not reference to this module here. if it can be done without internal soldering, then I am in).
Soon after Plus/4 intro the Sinclair 128, the Amstrad CPC6128 and the Sinclair QL arised, and the 128K machines sounded more serious ones than the tiny 64K (treated as game machines at once). Also Apples could be ugraded with memory modules.
The internal memory expansion bay is a nice idea, but it would require a better MMU for eg 16KB bank switching, as 7501 can address only 64K.
I just checked the back side of the 364... Well, I though it is bigger Really no space for an additional IEEE-488. Not to mention, that insterion of IEEE-488 cables needed a LOT of space next to them.
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Posted By
JamesD
on 2016-09-19
16:28:34
| Re: What would I do differently in the Plus/4
This was more of a what they should have done different without redesigning the TED.
I'm operating under the assumption that pitching it as a business system came after the TED was pretty much done. I'm pretty much focusing on things to pitch it for small business or home business, but certainly not everything needs to focus on that, and other than the RAM expansion header, are mostly software
Engineers had a fixed number of gates to work with to fit on a certain size die, which was required to meet the price point. If they had space and time, I think they would have implemented some of what you suggest.
I thought all the timers were just count down one shot from the page I read. I probably just skimmed over the details. I haven't personally programmed it so I didn't know.
If I were designing the TED from scratch, knowing it would be pitched in a business system, I'd probably throw in a hardware 80 column mode, or maybe a 2 color 640x200 graphics mode for use with a software 80 column driver. All the other stuff is nice, but this is a clear advantage over the C64 and can go toe to toe with the Apple and TRS-80 in almost every way. Monitor issues begin to be a problem though.
The software 80 column driver I originally pitched was an alternative to hardware since the TED was already complete and it serves two purposes. The first, is so Commodore can say it can display 80 columns, admittedly with limitations. They would get criticized for readability, but you can clearly see a page layout and is it $600+ important for a complete system? The second, was so you could establish APIs for printing in 80 columns. Then if the machine is a success, follow it up with an enhanced TED that can display 80 columns better and software could already support it.
As for other changes that can happen after the silicon is set, I see that as ok.
Just remember that part of the reason for the new connectors was to squeeze everything into the 116.
If you change connectors, there is a size & cost impact. I already saw the 116 not being fully expandable like the Plus/4.
The C116 probably isn't large enough for a larger expansion connector or Atari style joysticks.
An internal header for a RAM expansion is at least doable on the C16 and probably the Plus/4 though it might be a squeeze or might need a slightly taller case.
The other problem with RAM expansion on the external port, is then you can't have the IEE interface MMS suggested.
I suggested an internal header for RAM expansion on the Plus/4 so the external port would be free for something else.
*edit*
The more I think about it, the more I think a 364 would have been the best chance of differentiating the TED from the C64, especially as a business system.
There's room for Atari style joystick connectors, 128K, 256K, etc...
And more importantly, it looks very different.
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Posted By
gerliczer
on 2016-09-19
13:27:12
| Re: What would I do differently in the Plus/4
@JamesD: I was under the impression, but after reading your post I'm probably wrong, that the topic was about how it should have been done (right) instead of how it was done. And, unless I misunderstood you again, actually there is one repeating timer already in TED ($FF00-01), the other two are free running, and there's no way to change their behavior.
@MMS: RAMEN is the RAM ENable signal. It can be seen in the Plus/4 schematics, that one pin has this designation on the expansion port, however it connects nowhere.
@My previous post: I forgot that the processor overflow input needs a pin on the expansion port.
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Posted By
JamesD
on 2016-09-19
12:38:13
| Re: What would I do differently in the Plus/4
gerliczer, I'm with you, but that is a significant redesign.
Optionally free running or repeating timers would be a significant improvement.
At least one of them should have offered repeating.
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Posted By
MMS
on 2016-09-19
16:36:39
| Re: What would I do differently in the Plus/4
wooow, gerliczer, it is a really fantastic list! And fully with you.
Lot of very true statements. (only RAMEN I do not know what it is)
Only one point I may add: based on my recent digging in technical documents and some C64 user port related circuit diagrams/projects I noticed, that despite different namings in the C64 and Plus/4 documents, the two user ports (or at least te most critical serial communication lines) are more similar to each other than we ever though.
I suppose (not tried out yet, especially as there is no real useful PRG) that the C64 / VIC-20 Modems will properly work on Plus/4 too. So I should buy a modem first
JamesD: actually there are TWO implementations for IEEE-488 for smaller 8 bits.
1) what made by Commodore for VIC-20 officially, and later cloned to C64: a full, proper IEEE-488 interface on the Expansion port. Fast and reliable, behave as a PET. Called VIC-1112 cartridge.
It is not SO complicated (ehehehe) but would add several new components to the Plus/4 circuitry.
So a built in Kernal support, and at least one really intergrated IC (or 4-5 more) would be required, and it is really against the original "cheap, low IC #"concept:
http://www.zimmers.net/anonftp/pub/cbm/schematics/cartridges/vic20/ieee-488/index.html
2) Some cheaper implementations (like mine, but was not cheap at all) is based on Jochen Adler design is putting an IEC to IEEE-488 interface on IEC port.
It fully translates the IEC commands to IEEE-488 port, but slow as hell. Or the same as normal IEC with 1541, I mean normal snail speed
It supports JiffyDOS (so theoretically could be blazing fast on a parallel port) BUT I think there is no JiffyDOS EPROM for any IEEE-488 type floppy I am aware.
Details:
http://www.nlq.de
The list of component, cost:
http://www.zahnarzt-adler.de/nlq/ajni2blt.txt
Soooo, it will be always 400byte/sec speed, till someone develops a JiffyDOS ROM for an IEEE-488 devices (if it may work at all via a parallel cable).
But at least it works on Plussy too. Unfortunately not perfect, as my SFD1001 reacts tothe commands, but does not format and read anything. probably need a head cleaning....
I hardly believe someone will design and produce a 1) type full feature IEEE-488 cartridge for Plus/4
And finally a nice (and I think best ever) summary about the fantastic Commodre drives, starting with the SFD-1001 (Super Floppy Disc) :-D
http://www.floodgap.com/retrobits/ckb/secret/periph.html
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Posted By
gerliczer
on 2016-09-19
04:49:11
| Re: What would I do differently in the Plus/4
Processor: complete 8 bit I/O port, overflow and NMI input, optionally capable of running at up to 4MHz.
TED: all timers programmable to be free running, repeating or one shot, and some even be cascaded; 15 levels of volume plus off, equal volume steps, 12 bit pitch control retaining original design, optionally independent noise channel; retaining VIC-II clock divisors (PAL 18, NTSC 14) and 63 cycle rasterline length; double speed data fetch, so there's only one badline and less stolen cycles (I know, it depends on RAM speed, too); additional IRQ input instead of not implemented light pen interrupt; linear luma levels.
System: no unique, nowhere else used components like 6529B, TIAs, 6510T, 2mm contact pitch expansion port connector, etc. (joystick and datasette ports may stay); DMA, NMI and RAMEN input lines on expansion port; DMA and RAMEN logic implemented, memory expansion support in KERNAL with physical implementation guide; proper joystick port design with autofire compatibility; user port pin-out backward compatible with C64, all ACIA control signals connected; possibility to hide I/O area (using the additional processor I/O pin).
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Posted By
JamesD
on 2016-09-18
21:14:21
| Re: What would I do differently in the Plus/4
Ok, first of all, we are in complete agreement. The tragic voice was a horrible idea. Voice was just the thing of the moment.
Had they included an 8 bit DAC with the TED, I think voice hardware would be redundant anyway.
S.A.M. or sampled voice would be much better.
I'm really not familiar with the SFD (did it make it to the US?) but from what I can read with google translate, it sounds like it was interfaced to the C64 by someone. So they could have placed the interface for the SFD-1001 on the cartridge just like the 1551. Why I didn't make that minuscule leap of logic I'm not sure.
Then there is no expense of the new chip unless you want the drive, no wider circuit board, and it's just a change to the kernel I/O which might even be on the interface.
That fits nicely with the concept and gives the SFD a larger role.
If the 264 is a success, then maybe intro the 364 which has at least 128K standard and the numeric keypad.
I still think the burst mode should have been implemented for the future 1571.
I see that as the budget alternative in the long run.
The SFD has two CPUs and a quad density drive. It had to be more expensive.
Supplying 3+1 on disk means the software doesn't load instantly. That was their big selling point for including it in the first place. Hey look, Lotus 1-2-3... sort of, at a key press! I just wonder if anyone at Commodore actually ran it first.
If it's not built in, then it's little more than a bonus pack in, but that makes no sense if you don't have disk drive... so maybe offered with the drive rather than the computer or if you buy both as a package.
I've never used the full version (or the built in version much for that matter) so I can't say if that is good or bad. It certainly would be a nice little bonus if you are spending $600 on a machine (thinking of intro prices).
I do think optional built in ROMs is a nice feature but it should have been aimed at future enhancements rather than a rushed software package.
If the information I found is correct...
Tramiel resigned right after the 264 and 364 were displayed, so development started sooner than I thought. I'm not sure that really matters at this point.
The 264 could already be upgraded to 80K RAM. So 16K instead of +4 ROMs?
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Posted By
MMS
on 2016-09-18
19:34:37
| Re: What would I do differently in the Plus/4
Actually you are right in a lot of points. But I did NOT say to drop IEC. Keep if for the masses,and provide IEEE-488 for the classes :-)
264 shaped in the management mind as a more serious platform just only after Mr.Traimler left Commodore.
1571 is a nice product, one of the most "sexy looking" floopies ever made, I have one and defintiely my first prio device to link to my Plussy or C64. (in fact, due to VDC RMA size, if I will ever buy a C128, it will be the second C128D release with integrated 1571 + 64K RAM VCD)
1571 burst mode is just the mode/speed originally planned on VIC-20, C64 and 1541, if no bug would have been existed in the original HW, something realted to bit-banging, or what. (hopefully my sentences are right... )
Anyhow, despite 1571 is a nice product, it is still nowhere to the SFD-1001, even at similar speed (burst mode VS IEEE-488) the SFD has several times higher capacity. As it was released in 1984, it was sdevelopped paralelly to Plus/4.
So the C= team may work out the SFD1001 absed 1551, instead of the 1541 based 1551, if they already wanted a faster drive. I think SFD1001 was the right evolution pattern, not the 1551.
As SFD offered not only speed, but extra capacity too, no disc swapping during play and games on 4 discs.
And if someone has no need of high speeds (cost), can just select the IEC 1541/I or 1541/II
The 364 was a good idea, except the magic voice. I think magic voice and it's price killed the numeric keyboarded 364.
With 364's width, the extra IEEE-488 port would not hurt anyone.
C116 and C16 could have only the IEC (cheap platform, small space/old shape, no User port too).
So the current Plus/4 with 3+1 "feature" could have been skipped, and the other two should have 32KB RAM.
If you remember, with C64V3, Commodore packed the Berkeley GEOS1.2 on floppy free.
What if they would pack the Trimicro 3+1 on floppy in the same way? Probably for C= a floppy disc would be much cheaper, than a ROM, would be a nice (full) package instead of the semiseable 3+1 ROM (=less critical reviews, also 3+1 does not work with datasette) and generally speaking from almost the same HW price you get a semiprofessional interface with available devices. Or at least Commodre should have release an IEEE-488 on the expansion port as did for VIC-20.
I think Commodore already had a lot of experience and built in development cost with IEEE-488 and it's devices via PET series, too had they left that fast platform to die (up to 1MB/sec theoretical speed! )
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Posted By
JamesD
on 2016-09-18
18:28:36
| Re: What would I do differently in the Plus/4
Good points.
As you say, Commodore did have higher capacity devices off of the IEE-488 buss.
But you are talking about another connector, a controller chip, and the Kernel either has to support two interfaces, or it has to drop the cheaper one in favor of more expensive devices only.
Dropping the cheaper interface makes no sense, since that is required by the 116 and for compatibility.
I don't think that an integrated controller chip existed, so that would have to be developed.
Adding it to the TED would be a violation of the prime directive of this topic and I don't see it as feasible cost wise anyway.
A controller chip and large connector will add to the price of the machine, it might impact FCC testing, and the data storage devices seem a little expensive for the price of the computer.
If the controller chip didn't exist, development would have had to start after Jack was booted, after all, the idea of pitching the TED in a business system came after that.
So you have a short time frame for developing the chip which would be a risk.
Adding the IEEE connector would require dropping an expansion port, or a wider motherboard.
If you have a wider motherboard, you need a wider machine and Commodore may as well add the numeric keypad.
We aren't talking about just adding a header to the motherboard for a RAM expansion, a kernel change, and some changes to BASIC like I was. This is a significant hardware change and price change.
I think adding $5-$10 to the cost of the Plus/4 is one thing, but how much would other changes add to the price?
Commodore tried many more expensive business systems and they are all very rare.
You are correct in that the 1571 did not exist when the Plus/4 came out.
I'm suggesting moving that project ahead instead of the 1551 parallel drive. It probably would have cost a little more at that time than when it was actually released though.
The 1551 parallel drive should be faster than the 1571, and if it had been double sided that might have been an even better option than the 1571. But you end up with a product that can only work on the Plus/4 and not older machines.
I think the 1571 looks better to consumers buying a drive for an existing machine who plan to upgrade the computer in the future, if it's fully compatible with old software.
If Commodore drops the 1541 for only one product, I think the 1571 makes the most sense and they get away from the 1541 heat issues.
Retailers could stock one product instead of several with the 1571.
So the 1571 is probably a good option for everything but speed.
Atari didn't catch the same flack that Commodore did for slow drives and it uses a serial interface, so the potential is there. The question becomes is the burst mode fast enough?
I found conflicting numbers for the transfer rate so I really can't say.
The 1551 can supposedly transfer 1K per second according to one page and the 1571 can transfer 3K per second according to another. ???????
I can say this, if you are loading 16K programs, it's going to seem very fast. If you are loading 128K all at once... it's going to take over 40 seconds even at 3K per second. At least it's not cassette slow.
I think some of that 128K expansion could be a RAM disk. If the changes to make BASIC support RAM expansions are too complex, that's the fallback option from BASIC anyway.
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Posted By
MMS
on 2016-09-18
18:57:14
| Re: What would I do differently in the Plus/4
1571: that drive did no exist at the time of Plus/4 development.
They developped a brand new parallel communication interface, JUST and purely for the floppy drive.
It became 4 times faster than the IEC (IEE-488 serial implementation). Same speed as the IEE-488 drives.
But is required extra IC, housing for the device, etc. and only self-compatible, and used up the Expansion port.
At the same time, Commodore HAD a lot of IEE-488 devices, like the huge, 1MB capacity SFD1001 (I also have), 8050, 8250 drives, the really attractive MPP1361, CBM6400 printers, plotters and other more professional products.
Instead of develop a self-compatible floppy drive, they should have enstrenghten the professional part of the Plus/4 by adding an IEE-488 port. With that step, a lot of already existing (more professional) hardware would have been available for the Plus/4, with higher speed (1550 byte/sec for SFD1001 VS 400byte/sec of 1541)
It was told, that for VIC-20 and C64 the IEEE-488 was dropped due to the high price of implementation, but in 1983 the Commodore team should already now, how much debate the snail speed 1541 generated, and partially destroyed C64's image as a professional computer.
So instead of developing a new standard, they should have been working on a cheap IEEE-488 integration, and no new floppy drive should have been developped, just to use the available ones.
Then the Plus/4 could underline it's professional part and could became a Janus platform. Start as a cheap computer for starters with IEC devices (even datasettes), but could upgrade it's capabilities significantly with more professional grade IEE-488 devices.
Certainly it would add some USD to the platform price (but save a lot of 1551 development costs), but (including the dropped numeric keyboard idea) could step up as an educational and semi serious platform, and noone would expect it to be a playing computer with sprites and fancy sound.
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Posted By
JamesD
on 2016-09-17
01:37:32
| Re: What would I do differently in the Plus/4
Ok, why does the C64 matter here? I'm not trying to turn the Plus/4 into C64 part 2.
I'm trying to give it features that make it look more professional, give it more things the C64 doesn't have, and keep the custom chips pretty much the same. I'm basically trying to improve on the idea of selling it as a business machine, which is what Commodore already did.
Commodore didn't leave the educational market. They just never had that much of it after 1980. At least not in the US. Frankly, they didn't have any of the US market where I was from even before that.
They actually had an education program trying to promote the Amiga in schools. It was one guy and an assistant. I met them a couple times. By then schools were pretty focused on PCs and Apple by then other than video editing. I saw a couple demonstrations, and everyone was impressed... but never willing to buy.
I demonstrated the Amiga to several schools and school districts myself and it was like talking to a brick wall.
The head of a local educational service unit was stuck on the idea of using a PC to control a video disk for education. We are talking over $5000 in equipment, plus pressing content onto custom video disks.
A CDTV could have done it for under $1500 with just a CD burner and an authoring system to digitize and convert the video. But they didn't want to hear it. I was doing as much off of floppies as they were!
The 65802 and 65816 weren't available until a few months before the Plus/4 came out so the Plus/4 design would have been pretty much committed to a 6510 derivative by then.
MOS didn't own them either, so Commodore would have had to make the machine more expensive.
Now that you mention it, MOS didn't even own the 65C02 so that would be out as well and it's a non-starter anyway. Oh, and I believe WOZ said the first 65816s were buggy... so not shipping a Plus/4 with it in 1984.
FWIW, the Apple IIe came with the 65c02 and it didn't give Apple any problems.
I've also written 65c02 code. In my case, the code was about 5% smaller than without the 65c02.
And the old JMP instructions are the same, it just adds a new variation for calling via tables.
My code used it, a self modifying 6502 version, and a rommable 6502 version selectable with a define.
In RAM, it's a bit of a wash using the new JMP mode, but in ROM it saves quite a few clock cycles and instructions.
The 65816 would certainly have been worth putting in the machine in my view, especially if you want to support more RAM from BASIC. Then you can have megabytes at your disposal instead of kilobytes and better support for high level languages. The heck with UCSD Pascal, include a native code compiler!
Sadly, I don't think you could have pitched that to management. It started as a $60 machine and they were trying to re-purpose the hardware for other sections of the market. They were already open to the business machine idea, so I just expanded on that in a way I thought would be more successful. I think Commodore was also planning on a Z8000 workstation at that time, since they had that running in 1985 which might have made it an even tougher sell to management... not that the Plus/4 could have competed with that machine.
The only way I see something like that happening, is if work had progressed on the 6516 (sometimes referred to as the 6509, a chip that was proposed back in 1978(?). See MICRO the 6502 Journal for a brief discussion of it), Commodore might have been able to purchase the rights to that. That would have pretty much been what the 65802 was but much earlier.
Commodore could have directed MOS to work on the idea themselves based on what was published, but that would have required a CEO with a little more vision. That could have even made it into the C64 given the timeline. But that is way out in what if land, I'm proposing simple changes I know they could have done.
The 1571 isn't difficult to use. That's all I used on my Plus/4 since I also have a 128. It even works with the C64 and VIC20 as a single sided drive. It only starts in double sided mode or uses high speed when the C128 talks to it and the C128 can fall back to single sided mode for making C64 disks. Just add those features to the Plus/4 OS.
The reason I suggested using the 1571, is that it doubles the storage per drive to makes it more competitive against the machines I mentioned.
It's pretty fast, not quite Jiffydos fast but not off by a lot if you see the benchmarks.
It also takes two of the competitors drives to store a similar amount of data.
I think the 1571 would actually store about 50K more than a dual drive TRS-80, and 70K more than a dual disk Apple!
The 1571 was supposedly $300. That's competitive to what a controller and two drives cost on another systems rather than appearing expensive like when the 1541 was introduced. And you can add greater disk capacity than other systems just by adding a 2nd drive or more.
If you think about the possible advertisements and compare features vs Apple, Atari, TRS-80 Model III...
it looks pretty good.
When the inevitable comparison to the C64 is made, sure it doesn't have sprites or a SID, but look what it has the C64 doesn't. It doesn't look like a cheap machine, it looks like a more professional machine.
At least that was my goal here. It might have flopped anyway, I just think it would have done better.
The cult of Apple was strong even then.
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Posted By
Litwr
on 2016-09-16
15:10:50
| Re: What would I do differently in the Plus/4
Why did CBM leave the educational market? Are there any data about this mystery? They also left the cheap text processors to Amstrad CPC/PCW...
IMHO 65C02 gives almost nothing but creates incompatibility. It can't use undocumented opcodes, works differently with JMP (), ...
It would be better to use 65816 or 65802.
1571 is too difficult to use. C64 can't use it...
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Posted By
JamesD
on 2016-09-15
20:09:13
| Re: What would I do differently in the Plus/4
I'm kinda liking the idea of offering schools machines preloaded with popular MECC titles in ROM.
I just wonder if there is enough space. Decompressing graphics shouldn't be slower than loading from a disk drive right?
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Posted By
JamesD
on 2016-09-16
02:13:20
| What would I do differently in the Plus/4
There is at least one earlier topic like this, but almost every response in that topic seemed to be about making the Plus/4 a better C64. That's not the approach I'm taking here... though I certainly sympathize with the desire to have those changes, and I may have even expressed the desire to include a blitter as an alternative to sprites in that thread. The idea here is to leave the TED as an inexpensive part and limit most changes to the Plus/4 and software.
The C116 was designed as a budget machine to compete with the ZX-80 & Speccy, and none of these changes should involve delaying the budget end machine or the TED. They should not impact the price point it was capable of achieving either.
The approach I'm taking here is more about targeting existing 8 bits that were used more for small business and home businesses than as a videogame... err... C64. That means the Apple II, TRS-80 Model III/IV, and CP/M.
As I said, the changes are mostly directed at the Plus/4 and the discussion is mostly targeted at the Apple II.
For hardware:
Add an internal expansion connector and a 128K RAM upgrade board, but with the possibility to add more with later boards. DRAM refresh might be an impact, but the hardware is mostly there so I would think not a big deal.
Base the processor on the 65C02. Code can be slightly smaller and faster. It's a cheap way to have a little advantage over machines like the Atari.
Replace the dorky arrows on the keyboard with regular style keys in a similar layout (rotated 45 degrees from the other keys). I think a couple MSX machines did this. I just think it looks more professional and shouldn't need the custom molded arrows that can bind easily.
For firmware:
Include a built in 80 column text driver using hi-res graphics.
Support expansion RAM from BASIC, and the 80 column driver.
Support the 1571. DSDD disks and burst mode data transfers.
None of that should require an expensive change to the TED or a delay to the product.
However, it does make the Plus/4 much more marketable vs other machines.
Ship it initially without the built in software suite, and sell it at a lower price so it's cheaper than the C64.
Then introduce ROM upgrades that newer machines can come with for more $, or can be added to existing machines.
A more professional, not rushed, productivity suite supporting expansion RAM, and allow switching between 40 or 80 columns at a key press.
A Pascal system (UCSD Pascal, which is what Apple Pascal is), this includes an editor, compiler, and assembler all in ROM, and support expansion RAM to cache dynamically loaded code.
And maybe some education oriented packages aimed at schools. Possibly different grade levels. Then not every machine needs a disk drive.
Commodore certainly would have had to pursue the US education market to really attack the Apple II on it's own turf. Getting a foothold in that market would be worth the investment in the long run.
I think one of their best shots for education would be to get MECC to create software ports by paying for the programmers and artists... along with some additional financial support. Oh look, we have the same programs and they look better, and sound better! Did we mention you can put several of our computers in your school for the price of one of theirs?
The Plus/4 is more powerful than the Apple II in almost every way except 80 column support, RAM expansions, and slots.
No the 80 column text done in hi-res isn't as easy to read, but most software only requires it to preview your work, and this could combine graphics with the text! The II couldn't do that without switching to graphics as well. The II is much slower for this.
They have RAM expansions, so do we. Even stevens and the Plus/4 can use it from BASIC where nobody else can.
No it can't do everything an Apple II can due with it's slots. But the Plus/4 had most of the hardware people use slots for built in. And a lot of those cards cost as much as a Plus/4!
The Plus/4 is also faster so there is less waiting or need for expensive accelerators that cost more than our machine!
I think this would have been a better approach than "oh look, built in crap software".
Lets face it, Commodore couldn't have done worse.
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