Posted By
unclouded
on 2019-12-12
03:57:30
|  Cycle counting with the TED timers
I saw in the 7360 datasheet that the TED timers count down at 884 kHz (for PAL systems). Is that the same frequency as the CPU in single-clock mode? Can the TED timers be used to count cycles in a routine to help figure out which routine is faster? I wrote some test code at https://github.com/un-clouded/Commodore-264/tree/master/examples/code-timing and it seems to work so far. The subroutine does:
clc
adc #$00
..and the .prg says $0004 consistently. I've yet to test larger routines but is this approach valid?
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