Posted By
TLC
on 2007-01-09
06:27:19
|  Re: Plus/4 Expansion port...
Another addition, which just popped up in my mind... in the hw-IRQ approach, a currently executed interrupt-mechanism could be sensed by just counting consecutive cpu write cycles... If 3 consecutive write cycles are counted, the EPROM / A9 trick could be asserted, as the next memory fetch by the CPU _will_ be done from the IRQ vector.
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